Zetav and Verif tools

  1. About
  2. Download
  3. Usage
  4. Configuration
  5. Input Format
  6. Contact
  7. Acknowledgement

About

Zetav

Zetav is a tool for verification of systems specified in RT-Logic language.

Verif

Verif is a tool for verification and computation trace analysis of systems described using the Modechart formalism. It can also generate a set of restricted RT-Logic formulae from a Modechart specification which can be used in Zetav.

Download

Zetav

Windows (32-bit)

Verif

Multi-platform (Java needed)
General Rail Road Crossing example

Usage

Zetav

With default configuration file write the system specification (SP) to the sp-formulas.in file and the checked property (security assertion, SA) to the sa-formulas.in file. Launch zetav-verifier.exe to begin the verification.

Verif

With the default configuration example files and outputs are load/stored to archive root directory. But using file-browser you are free to select any needed location. To begin launch run.bat (windows) or run.sh (linux / unix). Select Modechart designer and create Modechart model or load it from file.

Zenfone 9 Unlock Bootloader →

With the help of another forum user, "chnszg", Jack managed to find a temporary solution. They shared a script that would disable Secure Boot, but it required some technical expertise and a bit of luck.

In the end, Jack emerged victorious, having successfully unlocked his Zenfone 9's bootloader and gained superuser access. He had gained a deeper understanding of Android's inner workings and had forged connections with like-minded enthusiasts.

Jack breathed a sigh of relief as he verified that the bootloader was indeed unlocked. He then proceeded to install a custom recovery, TWRP, and eventually, a custom ROM. The possibilities were endless now.

He encountered his first roadblock when trying to enable Developer Options. The usual method of tapping the Build Number seven times didn't work, and he received an error message instead. Jack tried searching for alternative methods, but they all seemed to lead to dead ends. zenfone 9 unlock bootloader

The cat-and-mouse game continued, with Jack facing new challenges and obstacles. But he persevered, driven by his passion for tinkering and exploring the Zenfone 9's capabilities.

The process was nerve-wracking, with the tool displaying a warning message about potential risks. Jack's heart was racing as he clicked the "Unlock" button. The tool did its magic, and after a few minutes, the Zenfone 9's bootloader was unlocked.

Undeterred, Jack decided to seek help from the online community. He posted a question on a popular Android forum, hoping that someone had already figured out the solution. To his surprise, a user named "xXxRomXxX" replied with a detailed guide on how to unlock the Zenfone 9's bootloader. With the help of another forum user, "chnszg",

He began by searching online forums and Asus' official website for instructions on how to unlock the Zenfone 9's bootloader. The process seemed straightforward: enable Developer Options, toggle on OEM Unlock, and then use the fastboot oem unlock command. But Jack knew that it wasn't that simple.

As soon as the Zenfone 9 was released, tech enthusiast Jack couldn't wait to get his hands on one. He had been a loyal fan of Asus' Zenfone series for years, and the latest model promised to deliver top-notch performance and features. But Jack was different from the average user - he was a tinkerer, always looking to push his devices to their limits and explore their full potential.

One of the first things Jack did when he received his Zenfone 9 was to research how to unlock its bootloader. For those who don't know, unlocking a device's bootloader allows users to modify the operating system, install custom ROMs, and gain superuser access. Jack had done it on his previous Zenfone devices, but he knew that each new model brought new challenges. He had gained a deeper understanding of Android's

The unlocking of the Zenfone 9's bootloader had been a journey of trial and error, but for Jack, it was a testament to the power of community and the thrill of discovery. He knew that there were still more secrets to uncover, and he was eager to take on the next challenge.

The guide involved using a third-party tool to enable the OEM Unlock option, which was supposedly hidden by Asus. Jack was skeptical at first, but he decided to give it a try. He downloaded the tool and followed the instructions carefully.

However, Jack's journey didn't end there. He soon realized that Asus had implemented additional security measures to prevent unauthorized access. The device's Secure Boot mechanism was still intact, and Jack needed to find a way to disable it.

Input Format

Zetav

The Zetav verifier expects the input RRTL formulae to be in the following form:

<rrtlformula>    : <formula> [ CONNECTIVE <formula> ] ...

<formula>        : <predicate> | NOT <formula> | <quantifiedvars> <formula> | ( <formula> )

<predicate>      : <function> PRED_SYMB <function>

<function>       : <function> FUNC_SYMB <function> | @( ACTION_TYPE ACTION , term ) | CONSTANT

<quantifiedvars> : QUANTIFIER VARIABLE [ QUANTIFIER VARIABLE ] ...
Where predicate symbols (PRED_SYMB) could be inequality operators <, =<, =, >=, >, function symbols (FUNC_SYMB) could be basic + and - operators, action type (ACTION_TYPE) could be starting action (^), stop action ($), transition action (%) and external action (#). Quantifier symbols (QUANTIFIER) could be either an universal quantifier (forall, V) or an existential quantifier (exists, E). Connectives (CONNECTIVE) could be conjunction (and, &, /\), disjunction (or, |, \/), or implication (imply, ->). All variables (VARIABLE) must start with a lower case letter and all actions (ACTION) with an upper case letter. Constants (CONSTANT) could be positive or negative number. RRTL formulae in the input file must be separated using semicolon (;).

An example could look like this:
V t V u (
  ( @(% TrainApproach, t) + 45 =< @(% Crossing, u) /\
    @(% Crossing, u) < @(% TrainApproach, t) + 60
  )
  ->
  ( @($ Downgate, t) =< @(% Crossing, u) /\
    @(% Crossing, u) =< @($ Downgate, t) + 45
  )
)

Verif

Verif tool does not deal with direct input. Examples are load from files with extension MCH. Those files are in XML and describes model modes structure and transition between modes. There is no need to directly modify those files. But in some cases it is possible to make some small changes manualy or generate Modechart models in another tool.

Contact

If you have further questions, do not hesitate to contact authors ( Jan Fiedor and Marek Gach ).

Acknowledgement

This work is supported by the Czech Science Foundation (projects GD102/09/H042 and P103/10/0306), the Czech Ministry of Education (projects COST OC10009 and MSM 0021630528), the European Commission (project IC0901), and the Brno University of Technology (project FIT-S-10-1).